In the current networked environment, routers and switches are used connect a network and direct data to the appropriate destination. As the hardware capabilities of networked devices continue to grow, companies and network providers find themselves in a constant cycle of upgrading their existing equipment or buying new equipment in order to stay competitive. While it is comparatively easy to provide greater capacity for new software features by, for example, providing more storage and memory, it has proven difficult to provide greater capacity for hardware upgrades without buying an entirely new system. This is proving to be an expensive burden which shows no indication of relenting.
FIG. 1 illustrates various components utilized in an exemplary prior art router printed circuit board 100. In FIG. 1, a memory block 101 and a memory expansion socket 102 are coupled to a central processing unit (CPU) 103 by a system bus 104. Input/output (I/O) slots 105 and 115 are for add-in options cards which provide additional functions to router 100 and are coupled to a field programmable gate array (FPGA) 106 by a system bus 107. Digital signal processor (DSP) blocks 108 and 116 are special-purpose circuits used for digital signal processing which are commonly used in math-intensive signal processing applications and are coupled with FPGA 106 by a system bus 109. CPU 103 is further coupled with a complex programmable logic device (CPLD) 110 by a system bus 111. Printed circuit board 100 is further comprised of an Ethernet port 112, and a console port 113 and auxiliary port 114 which are both, for example, RS-232 ports and are coupled to CPU 103 by system busses (not shown). An encryption card (not shown) interfaces with CPU 103 and usually sits above it.
In order to gain a competitive advantage, manufacturers of routers and switches have developed an architecture for their products which will lower their costs as much as possible. Elements of this architecture include using Application Specific Integrated Circuits (ASICs), shared system busses, and integrating as many system components directly on the device's motherboard as possible. In placing system components on the motherboard, the manufacturer can keep costs down by not having to provide interfaces for add-in options cards which are more expensive to the manufacturer. While these steps lower the short term costs to manufacturers and consumers, in the long run they are proving to be more expensive for consumers and manufacturers due to the fact that the system hardware can not be reconfigured.
In using ASICs, the available hardware features for a given device are limited to whatever features the ASIC can provide. The ASICs are normally bonded to the printed circuit board of the device and can not be removed because this is less expensive than providing interfaces on the motherboard for accommodating add-in options cards. This makes it impossible to upgrade the hardware features or the performance of the device and necessitates buying new equipment in order to keep pace with changing technology.
One example of this is the CPU (e.g., CPU 103 of FIG. 1). When a new generation CPU becomes available, it typically has a different physical connection (or pin-out) from the preceding generation. This makes it impossible to simply boost the device's performance by adding a faster CPU because a new motherboard is needed as well to accommodate the new CPU pin-out. Furthermore, while the technology can change every 6 months, it takes up to 9 months for the manufacturer to develop and distribute the new technology to the consumer. This means that the devices frequently get shipped with technology which is already a generation behind and can not be easily updated or reconfigured.
To provide some level of reconfigurability, manufacturers provide a limited number of interfaces for add-in cards. As was previously stated, the number of interfaces is kept to a minimum to keep motherboard fabrication costs down. These interfaces are limited in the hardware features which they provide because they are given only limited access to system resources. For example, these interfaces do not have full access to the data, control, and address busses of the motherboard. This limits the functionality of the add-in cards. Furthermore, there is no provision for changing the hardware configuration of these add-in cards to add hardware features or extends their usable lifetime. The only other interfaces on the motherboards are for adding more memory to the system which does not address the problem of hardware reconfigurability.
Another way of providing reconfigurability is to use Programmable Logic Devices (PLDs) such as Complex Programmable Logic Devices CPLDs (e.g., CPLD 110 of FIG. 1) and Field Programmable Gate Arrays FPGAs (e.g., FPGA 106 of FIG. 1). PLDs are logic chips which can be programmed at the customers site by a software file which configures the PLD to perform a logical function. Typically, PLDs have been limited by the nature of the connection they share with the rest of the system. Frequently, they only have limited access to the data and address busses of a router. In other instances, they are only accessed by the system CPU through the system control bus. This limits the utility of PLDs because the range of functions they are capable of performing is limited by the lack of access to all of the resources of the system printed circuit board.
Another drawback which prevents using PLDs to their full advantage is that the configuration software for the PLD is typically downloaded to a serial Programmable Read Only Memory (PROM) device. While PLDs can be reconfigured numerous times, serial PROMs can only be programmed once which in turn limits the PLD to being configured once. This negates the advantage of having programmable logic devices in the system and prevents using them to their full potential. Furthermore, because the serial PROMs limit the PLDs to only one reconfiguration, additional serial PROMs and PLDs have to be added to the system to reconfigure each additional component in the system such as add-in cards and I/O boards.
Accordingly, a need exists for a secure method for updating the hardware configuration of a networked communications device to extend the usable life of the printed circuit board as well as any add-in options cards coupled to it. It is also desirable that this method provides a centralized approach for updating the system as a whole and can perform the hardware reconfiguration automatically or with minimal user intervention.